Integrated circuits such as, for example, random access memories, must be functionally tested to determine the characteristics of the circuit. The characteristics include the voltage levels at which the circuit will operate and the speeds at which the circuit will perform.
Such testing has previously been performed by providing variable amplitude reference voltages to the input terminal of a circuit while monitoring an output terminal to determine the response of the circuit. However, many memory circuits now in use multiplex a particular terminal to both receive and transmit logic states. These circuits typically have a high input impedance when the circuit is in the receive mode but have a low output impedance when the circuit is in the transmit mode. When the circuit is transmitting logic states to the testing apparatus, a load must be provided in order for the circuit to properly function. But, when a load is connected to the multiplexed terminal when it is receiving logic states, the driving apparatus will be excessively loaded which will in turn alter the reference voltage provided to the circuit. There have been previous circuits designed to switch the load in and out of the testing circuit depending upon the operating mode of the circuit under test. This approach, however, has not been completely successful since the switching generates timing problems, voltage aberrations and signal transients which produce unwanted noise.
In view of the need to test circuits having multiplexed terminals and the problems incurred in such testing, there exists a need for a method and apparatus for testing a circuit having multiplexed input/output terminals to provide stable and accurate reference voltages without loading the test apparatus while also providing the required load for the circuit under test.